In the fabrication of semiconductor devices, isolation structures are often formed between active areas in which electrical devices such as transistors, memory cells, or the like, are to be formed. The isolation structures are typically formed during initial processing of a semiconductor substrate, prior to the formation of such electrical devices. Typical isolation techniques include shallow trench isolation (STI).
Shallow trench isolation (STI) techniques involve the formation of shallow trenches in the isolation areas or regions of a semiconductor wafer. The shallow trenches are then filled with dielectric material such as silicon dioxide to provide electrical isolation between devices subsequently formed in the active regions on either side of the filled trenches.
In forming an STI structure, a pad oxide layer and nitride layer are typically formed over the substrate surface and patterned to expose only the isolation regions. The nitride layer operates as a hard mask during subsequent processing steps, and the pad oxide layer functions to relieve stress between the underlying silicon substrate and nitride layer. An isotropic etch is then performed to form a trench through the nitride, pad oxide, and substrate. Once the trench is etched, oxide material is typically deposited to fill the trench. Thereafter, the device is commonly planarized using a chemical mechanical polishing (CMP) process and the nitride layer is removed using hot phosphoric acid deglazing.
In conventional shallow trench isolation processing, the formation of unwanted oxide recesses or “divots” at the sharp corners at the isolation trench moat can cause various problems with the later fabrication processing of transistors and other devices in the adjacent active regions. Such divots can form due to the erosion of oxide during deglazing. Another problem with conventional processes is the necessity of using a design size adjust (DSA) in an effort to adjust the process in order to fabricate a device of the desired size. For example, due to predicted silicon loss after oxide liner growth, it is known to make the trench smaller than the desired final dimensions. Thus, if the predictions are correct, the correct size is achieved. In addition to uncertainty in making predictive design size adjustments, problems arise in attempting to make the trenches smaller to allow for the loss of material during later processing. Due to their size, smaller trenches are more difficult to pattern, etch, and fill properly. One such problem with fill, particularly in smaller dimension devices, is “bottlenecking” due to the nature of the walls of the isolation trench. The trench walls, being etched from silicon crystal, have a changing planar orientation throughout their slope. This causes increased oxide growth near the top of the walls, and decreased oxide growth near the bottom. The resulting thicker oxide layer at the top impedes filling.
FIG. 1 is a cross-section view of an example of an STI structure known in the arts. A representative portion of a device 10 is shown with an STI structure 12. A trench 14 has been etched into a silicon substrate 16 and a pad oxide layer 18 has been grown using a thermal oxidation process. A nitride layer (not shown) is commonly used to protect the remainder of the device during the formation of trenches. The trench 14 has its walls 20 covered with an oxide liner 19. It can be seen that the oxide liner 19 exhibits bottlenecking 22 at the upper portion of the walls 20. The trench 14 is filled with dielectric oxide material 24 and the protective nitride layer has been removed from the remainder of the device 10, leaving divots 26 at the edges of the dielectric material 24 of the STI structure 12. Divots 26 are caused by deglazing the moat nitride and by subsequent processing using hydrofluoric acid deglaze. Attempts have been made to address the problems of divot and bottleneck formation, such as moat nitride pullback and in-situ steam generation processing (ISSG), however such efforts have been troublesome due to the susceptibility of the structure to damage during further processing.
Improved STI techniques would be desirable in the art. Shallow trench isolation processes that prevent deterioration of STI structures during further processing and reduce or eliminate the need for DSA would be useful and advantageous. Further advantages would inhere in such improved processes suitable for use with current manufacturing equipment and processes, yet adaptable to avoiding the formation of divots and bottlenecking.